Semiformal Verification of Software-controlled Connections
Tomás Grimm, Lettnin, Djones, Michael Hübner
IEEE Computer Society Annual Symposium on VLSI, 2017
The verification of both hardware and embedded software has become an important subject over the last years. However, neither standalone verification approaches like simulation-based or emulation nor state-of-the-art formal verification approaches are able to co-verify hardware/software modules in complex SoCs. This work proposes a semiformal approach to formally verify software-controlled connections in an attempt to start closing the hardware/software formal co-verification gap. Currently, this architectural aspect is partially verified using simulation. This approach presented interesting results compared to formal verification and simulation methods.