Tool flow for automatic generation of architectures and test-cases to enable the evaluation of CGRAs in the context of HPC applications

2017 - Florian Fricke, André Werner, Michael Hübner

Con­fe­rence: 2017 Con­fe­rence on De­sign and Ar­chi­tec­tu­res for Si­gnal and Image Pro­ces­sing (DASIP), Dresden

Hardware acceleration of novel chaos-based image encryption for IoT applications

2017 - Salma Hesham, Mohamed Abd El Ghany Salem, Andrew Boutros, Barbara Georgy

Application-Specific Processing using High-Level Synthesis for Networks-on-Chip

2017 - Jens Rettkowski, Diana Göhringer

2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Cancun, 2017.

Towards a Type 0 Hypervisor for Dynamic Reconfigurable Systems

2017 - Benedikt Janßen, Fatih Korkmaz, Halil Derya, Michael Hübner, Mário Ferreira, João Canas Ferreira

2017 In­ter­na­tio­nal Con­fe­rence on Re­Con­Fi­gura­ble Com­pu­ting and FPGAs (Re­Con­Fig), Can­cun, 2017

A call-up for circuit-switched NoCs in the Dark-Silicon Era

2017 - Salma Hesham, Diana Göhringer, Mohamed Abd El Ghany Salem

IEEE Nordic Circuits and Systems Conf. (NORCAS): NORCHIP and International Symp. of System-on-Chip (SoC), Linkoping, 2017, pp. 1-6.

A rapid control prototyping platform methodology for decentralized automation

2017 - Florian Kästner, Benedikt Janßen, Sebastian Schwanewilms, Michael Hübner

Conference: 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)

Hardware-beschleunigte eingebettete SAR -Prozessoren für Echtzeit FMCW -Radar Anwendungen

2017 - Jonas Wagner, Jan Barowski, Tobias Kalb, Diana Göhringer, Ilona Rolfes

Klein­heu­ba­cher Ta­gung 2017, U.R.S.I. Lan­des­aus­schuss in der Bun­des­re­pu­blik Deutsch­land e.V., Mil­ten­berg, Ger­ma­ny, Sep 25-27, 2017

Robust Lane Recognition for Autonomous Driving

2017 - Lester Kalms, Jens Rettkowski, Marc Hamme, Diana Göhringer

In Proc. of the Conference on Design and Architectures for Signal and Image Processing (DASIP), pp. 1-6, Dresden, Germany

A Dynamic Partial Reconfigurable Overlay Concept for PYNQ

2017 - Benedikt Janßen, Pascal Zimprich, Michael Hübner

International Conference on Field-Programmable Logic and Applications (FPL) 2017, Ghent, Belgium

A Hardware Accelerator Framework Approach for Dynamic Partial Reconfigurable Overlays on Xilinx PYNQ

2017 - Benedikt Janßen, Tim Wingender, Michael Hübner

LNI-Band: Informatik 2017, Lecture Notes in Informatics (LNI)