HW/SW Co-design of an IEEE 802.11a/g Receiver on Xilinx Zynq SoC using High-Level Synthesis

2017 - Jens Rettkowski, Diana Göhringer, S. Nouri, J. Nurmi

International Symposium on Highly-Efficient Accelerators Reconfigurable Technologies (HEART), Bochum, June 7-9, 2017.

Dynamic Run-time Hardware/Software Scheduling For 3D Reconfigurable SoC

2014 - Quang-Hai Khuat, Daniel Chillet, Michael Hübner

2014 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2014), December 8-10, 2014, Cancun, Mexico