Publications

Communication Architectures for Dynamically Reconfigurable FPGA Designs

2007 - T. Pionteck, C. Albrecht, R. Koch, E. Maehle, Michael Hübner, J. Becker

Parallel and Distributed Processing Symposium IPDPS, Long Beach, CA, USA, 2007

Dynamic and Partial FPGA Exploitation

2007 - J. Becker, Michael Hübner, G. Hettich, R. Constapel, J. Eisenmann, J. Luka

IEEE Special Issue "Advanced Automobile Technologies" (February 2007, Volume 95, Number 2

Optically Powered Video Camera Network

2006 - G. Boettger, Michael Hübner, M. Dreschmann, C. Klamouris, K. Paulsson, T. Kueng, A. W. Bett, J. Becker, W. Freude, J. Leuthold

VDE-ITG-Fachtagung Kommunikationskabelnetze, Cologne, Germany, 2006

Optically powered platform with Mb/s transmission over a single fiber

2006 - C. Klamouris, G. Boettger, Michael Hübner, M. Dreschmann, K. Paulsson, A. W. Bett, T. Kueng, J. Becker, W. Freude, J. Leuthold

32th European Conf. Optical Communications (ECOC), Cannes, France, 2006

Vorrichtung und Verfahren zur Abarbeitung priorisierter Steuerungsprozesse

2006 - Michael Hübner

Patent mit Daimler 2006, Nummer: DE102005010477A1

Exploiting Dynamic and Partial Reconfiguration for FPGAs - Toolflow, Architecture and System Integration

2006 - Michael Hübner, J. Becker

Invited Tutorial, SBCCI, Ouro Preto, Brazil, 2006

On-Line Optimization of FPGA Power-Dissipation by Exploiting Run-time Adaption of Communication Primitives

2006 - K. Paulsson, Michael Hübner, J. Becker

SBCCI, Ouro Preto, Brazil, 2006

Run-time Reconfigurabilility and other Future Trends

2006 - J. Becker, Michael Hübner

SBCCI, Ouro Preto, Brazil, 2006

Steuergerät mit konfigurierbaren Hardwaremodulen

2006 - Michael Hübner

Patent mit Daimler 2006 Nummer: DE102005010476A1

Strategies to On-Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration

2006 - K. Paulsson, Michael Hübner, J. Becker

Adaptive Hardware and Systems (AHS), Istanbul, Turkey, 2006

Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs

2006 - Michael Hübner, C. Schuck, J. Becker

20th International Parallel and Distributed Processing Symposium (IPDPS) 2006, Rhodos, Greece

Physical 2D Morphware and Power Reduction Methods for Everyone

2006 - J. Becker, Michael Hübner, K. Paulsson

Dagstuhl Seminar, Schloss Dagstuhl, Germany, 2006

Seamless Design Flow for Run-Time Reconfigurable Automotive Systems

2006 - Michael Hübner, J. Becker

Date 2006, Automotive Friday Workshop, Munich, Germany

New 2-dimensional partial dynamic reconfiguration techniques for real-time adaptive microelectronic circuits

2006 - Michael Hübner, C. Schuck, M. Kuehnle, J. Becker

IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, 2006, Karlsruhe, Germany

Methods for run-time failure recognition and recovery in dynamic and partial reconfigurable systems based on Xilinx Virtex-II Pro FPGAs

2006 - K. Paulsson, Michael Hübner, M. Jung, J. Becker

International Symposium on VLSI 2006, Karlsruhe, Germany

Tutorial on Macro Design for Dynamic and Partially Reconfigurable Systems

2006 - Michael Hübner, J. Becker

RC-Education 2006, Karlsruhe, Germany

Models and Tools for the Dynamic Reconfiguration of FPGAs

2005 - A. Donlin, J. Becker, Michael Hübner

IEEE-SOCC, Washington, USA, 2005

Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics

2005 - J. Becker, Michael Hübner, K. Paulsson, A. Thomas

ReCoSoc, Montpellier, France, 2005

Parallel and Flexible Multiprocessor System-On-Chip for Adaptive Automotive Applications based on Xilinx MicroBlaze Soft-Cores

2005 - Michael Hübner, K. Paulsson, J. Becker

Parallel and Distributed Processing Symposium (IPDPS) 2005, Denver, USA

Automotive Control Unit Optimisation Perspectives: Body Functions on-Demand by Dynamic Reconfiguration

2005 - J. Becker, Michael Hübner, K. D. Mueller-Glaser, R. Constapel, J. Luka, J. Eisenmann

DATE, Munich, Germany, 2005

Real-time configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation

2005 - Michael Hübner, M. Ullmann, J. Becker

International Journal Embedded Systems Vol. 1, No. 3/4, 2005, pp. 263 - 273

Real-time LUT-based Network Topologies for dynamic and partial FPGA Self-Reconfiguration

2004 - Michael Hübner, T. Becker, J. Becker

SBCCI, Porto de Galinhas, Brazil, 2004

Scalable Application-Dependent Network on Chip Adaptivity for Dynamical Reconfigurable Real-Time Systems

2004 - Michael Hübner, M. Ullmann, L. Braun, A. Klausmann, J. Becker

Field Programmable Logic and Application Lecture Notes in Computer Science Volume 3203, 2004, pp 1037-1041

On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities

2004 - M. Ullmann, Michael Hübner, B. Grimm, J. Becker

FPL, Antwerpen, Belgien, 2004

Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs

2004 - B. Blodget, C. Bobda, Michael Hübner, A. Niyonkuru

Tutorial Paper, FPL, Antwerpen, Belgien, 2004

An FPGA Run-Time System for Dynamical On-Demand Reconfiguration

2004 - M. Ullmann, B. Grimm, Michael Hübner, J. Becker

IPDPS 2004, Santa Fe, USA

Real-time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration

2004 - Michael Hübner, M. Ullmann, F. Weissel, J. Becker

IPDPS 2004, Santa Fe, USA

Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations

2003 - J. Becker, Michael Hübner, M. Ullmann

VLSI-Soc, Darmstadt, Germany, 2003

Power estimation and power measurement of Xilinx Virtex FPGAs: trade-offs and limitations

2003 - J. Becker, Michael Hübner, M. Ullmann

16th Symposium on Integrated Circuits and Systems Design (SBCCI), Sao Paulo, Brazil, 2003
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