Publications

First Evaluation of FPGA Reconfiguration for 3D Ultrasound Computer Tomography

2010 - M. Birk, C. Hagner, M. Balzer, N. Ruiter, Michael Hübner, J. Becker

5th International Workshop on Reconfigurable Communication-centric Systems on Chip (ReCoSoC), Karlsruhe, Germany, 2010

Impact of Task Distribution, Processor Configurations and Dynamic Clock Frequency Scaling on the Power Consumption of FPGA-based Multiprocessors

2010 - Diana Göhringer, J. Obie, Michael Hübner, J. Becker

5th International Workshop on Reconfigurable Communication Centric Systems-on-Chip (ReCoSoC), Karlsruhe, Germany, 2010

A Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip

2010 - Diana Göhringer, Michael Hübner, M. Benz, J. Becker

18th International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Charlotte, USA

Optically powered low-energy demarcation device for monitoring FTTx networks

2010 - M. Roeger, B. Hiba, M. Hoh, J. Hehmann, T. Pfeiffer, Michael Hübner, J. Becker, J. Leuthold, W. Freude

Conference on Optical Fiber Communication collocated National Fiber Optic Engineers Conference (OFC/NFOEC), San Diego, CA, USA, 2010

Single source optical OFDM transmitter and optical FFT receiver demonstrated at line rates of 5.4 and 10.8 Tbit/s

2010 - D. Hillerkuss, T. Schellinger, R. Schmogrow, M. Winter, T. Vallaitis, R. Bonk, A. Marculescu, J. Li, M. Dreschmann, J. Meyer, S. Ben Ezra, N. Narkiss, B. Nebendahl, F. Parmigiani, P. Petropoulos, B. Resan, K. Weingarten, T. Ellermeyer, J. Lutz, M. Moller, Michael Hübner, J. Becker, C. Koos, W. Freude, J. Leuthold

Conference on Optical Fiber Communication collocated National Fiber Optic Engineers Conference (OFC/NFOEC), San Diego, CA, USA, 2010

CAP-OS: Operating System for Runtime Scheduling, Task Mapping and Resource Management on Reconfigurable Multiprocessor Architectures

2010 - Diana Göhringer, Michael Hübner, E. Nguepi Zeutebouo, J. Becker

IEEE International Symposium on Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, USA, 2010

Fast dynamic and partial reconfiguration Data Path with low Hardware overhead on Xilinx FPGAs

2010 - Michael Hübner, Diana Göhringer, J. Noguera, J. Becker

IEEE International Symposium on Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, USA 2010

Car-to-X Simulation Environment for comprehensive Design Space Exploration Verification and Test

2010 - C. Roth, O. Sander, Michael Hübner, J. Becker

SAE 2010 World Congress & Exhibition, Detroit, Michigan, USA

FPGA-based Embedded Signal Processing for 3D Ultrasound Computer Tomography

2010 - M. Birk, S. Koehler, M. Balzer, Michael Hübner, N. Ruiter, J. Becker

17th IEEE-NPSS Real Time Conference (RT), Lissabon, Portugal, 2010

Semi-Automatic Toolchain for Reconfigurable Multiprocessor Systems-on-Chip: Architecture Development and Application Partitioning

2010 - Diana Göhringer, Michael Hübner, M. Benz, J. Becker

In Proc. of the International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, USA.

Selected Papers from ReCoSoc 2008

2009 - Michael Hübner, G. Sassatelli, P. Zipf

International Journal of Reconfigurable Computing 2009

Konfigurierbares Feldgerät für die Prozessautomatisierungstechnik

2009 - Michael Hübner

Patent mit Endress und Hauser 2009, Nummer: EP000002113067A1

A Multi-Core Signal Processor for Heterogeneous Reconfigurable Computing

2009 - D. Rossi, F. Campi, M. Kuehnle, Michael Hübner, J. Becker

International Symposium on System-on-Chip, Tampere, Finland, 2009

RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip

2009 - F. Campi, R. Koenig, M. Dreschmann, M. Neukirchner, D. Picard, M. Juttner, E. Schuler, A. Deledda, D. Rossi, A. Pasini, Michael Hübner, J. Becker, R. Guerrieri

International Symposium on System-on-Chip, Tampere, Finland, 2009

BRICK: a multi-context expression grained reconfigurable architecture

2009 - Juan Fernando Eusse, Michael Hübner, R. Jacobi

22nd Symposium on Integrated Circuits and System, SBCCI, Natal, Brazil, 2009

Dynamic Reconfigurable Mixed-Signal Architecture for Safety Critical Applications

2009 - R. Girardey, Michael Hübner, J. Becker

19th International Conference on Field Programmable Logic and Applications (FPL), Prague, Czech Republic, 2009

Star-Wheels Network-on-Chip featuring a self-adaptive mixed topology and a synergy of a circuit- and a packet-switching communication protocol

2009 - Diana Göhringer, B. Liu, Michael Hübner, J. Becker

19th International Conference on Field Programmable Logic and Applications (FPL), Prague, Czech Republic, 2009

System zur flexiblen Konfiguration von Funktionsmodulen

2009 - Michael Hübner

Patent mit Endress und Hauser 2009, Nummer: EP000002082485A2

A Taxonomy of Reconfigurable Single/Multi-Processor Systems-on-Chip

2009 - Diana Göhringer, Michael Hübner, T. Perschke, J. Becker

Hindawi International Journal of Reconfigurable Computing.

Routingmodul zum Datenaustausch

2009 - Michael Hübner

Patent mit Daimler 2009, Nummer: DE102007049043A1

Current Trends on Reconfigurable Computing

2008 - J. Becker, Michael Hübner, R. Woods, P. Long, R. Esser, L. Torres

International Journal of Reconfigurable Computing, 2008

Adaptive real time image processing exploiting two dimensional reconfigurable architecture

2008 - L. Braun, Diana Göhringer, T. Perschke, V. Schatz, Michael Hübner, J. Becker

Springer Journal of Real-Time Image Processing, vol. 4, no. 2, pp.109-125.

Standards for Electric/Electronic Components and Architectures

2008 - J. Becker, O. Sander, Michael Hübner, M. Traub, T. Weber, J. Luka, V. Lauer

Convergence 2008, Detroit, USA

An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC

2008 - M. Kuehnle, Michael Hübner, J. Becker, A. Deledda, C. Mucci, F. Ries, A. M. Coppola, L. Pieralisi, R. Locatelli, G. Maruccia, T. DeMarco, F. Campi

IEEE Design & Test of Computers 2008

Dynamic Reconfiguration of Nano Architectures using Application Independent Fault Detection

2008 - M. Niknahad, C. Schuck, Michael Hübner, J. Becker

AMWAS School and Workshop, Lugano, Switzerland, 2008

Techniques for Power Optimized FPGA Design: Novel Approaches towards Power Reduction for Future Tool Supported Design Automation

2008 - R. Esser, J. Noguera, J. Becker, Michael Hübner, K. Paulsson

PATMOS 2008, Lisbon Portugal

A multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput

2008 - C. Claus, B. Zhang, W. Stechele, L. Braun, Michael Hübner, J. Becker

International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, 2008

Data path driven waveform-like reconfiguration

2008 - L. Braun, K. Paulsson, H. Kromer, Michael Hübner, J. Becker

International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, 2008

Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization

2008 - K. Paulsson, Michael Hübner, J. Becker

Field Programmable Logic and Applications (FPL), Heidelberg, Germany, 2008

Fine grain reconfigurable architectures

2008 - J. Angermeier, M. Majer, J. Teich, L. Braun, T. Schwalb, P. Graf, Michael Hübner, J. Becker, E. Lubbers, M. Platzner, C. Claus, W. Stechele, A. Herkersdorf, M. Rullmann, R. Merker

International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, 2008

New Dimensions for Multiprocessor Architectures: On Demand Heterogeneity, Infrastructure and Performance through Reconfigurability: The RAMPSoC Approach

2008 - Diana Göhringer, Michael Hübner, T. Perschke, J. Becker

International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, 2008

Data Reallocation by Exploiting FPGA Configuration Mechanism

2008 - O. Sander, L. Braun, Michael Hübner, J. Becker

Reconfigurable Computing: Architectures, Tools and Applications (RAW), Miami, Florida, USA, 2008

FPGA Based Stepper Motor Control Function Exploiting Run-Time Reconfiguration

2008 - N. Dahm, Michael Hübner, J. Becker

ReCoSoC Workshop Proceedings, Barcelona, Spain, 2008

A framework for dynamic 2D placement on FPGAs

2008 - C. Schuck, M. Kuehnle, Michael Hübner, J. Becker

IEEE International Symposium on Parallel and Distributed Processing (IPDPS), Miami, Florida, USA

Run-Time Reconfigurable Adaptive Multilayer Network-on-Chip for FPGA-based Systems

2008 - Michael Hübner, L. Braun, Diana Göhringer, J. Becker

IEEE International Symposium on Parallel and Distributed Processing (IPDPS), Miami, Florida, USA, 2008

Runtime Adaptive Multi-Processor System-on-Chip: RAMPSoC

2008 - Diana Göhringer, Michael Hübner, V. Schatz, J. Becker

IEEE International Symposium on Parallel and Distributed Processing (IPDPS), Miami, Florida, USA.

Cost and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs

2008 - K. Paulsson, Michael Hübner, J. Becker

Design, Automation and Test in Europe (DATE), Munich Germany, 2008

Exploitation of the External JTAG Interface for Internally Controlled Configuration Readback and Self-Reconfiguration of Spartan 3 FPGAs

2008 - K. Paulsson, U. Vierec, Michael Hübner, J. Becker

Symposium on VLSI (ISVLSI), Montpellier, France, 2008

Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor

2008 - A. Deledda, C. Mucci, A. Vitkovski, M. Kuehnle, F. Ries, Michael Hübner, J. Becker, P. Bonnot, A. Grasset, P. Millet, M. Coppola, L. Pieralisi, R. Locatelli, G. Maruccia, F. Campi, T. DeMarco

Design, Automation and Test in Europe (DATE), Munich, Germany, 2008

An Optically Powered Video Camera Link

2008 - G. Boettger, M. Dreschmann, C. Klamouris, Michael Hübner, M. Röger, A. W. Bett, T. Kueng, J. Becker, W. Freude, J. Leuthold

IEEE Photonics Technology Letters 2008

Optically Powered Video Camera Link

2007 - G. Boettger, Michael Hübner, C. Klamouris, M. Dreschmann, A. W. Bett, J. Becker, W. Freude, J. Leuthold, M. Roeger

33rd European Conference and Exhibition on Optical Communication (ECOC), Berlin, Germany, 2007

A Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures

2007 - P. Graf, Michael Hübner, K. D. Mueller-Glaser, J. Becker

International Conference on Field Programmable Logic and Applications, (FPL), Amsterdam, The Netherlands, 2007

Circuit Switched Run-Time Adaptive Network-on-Chip for Image Processing Applications

2007 - L. Braun, Michael Hübner, J. Becker, T. Perschke, V. Schatz, S. Bach

International Conference on Field Programmable Logic and Applications, (FPL), Amsterdam, The Netherlands, 2007

Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs

2007 - K. Paulsson, Michael Hübner, G. Auer, M. Dreschmann, L. Chen, J. Becker

International Conference on Field Programmable Logic and Applications (FPL), Amsterdam, The Netherlands, 2007

On-Line Routing of Reconfigurable Functions for Future Self-Adaptive Systems - Investigations within the AETHER Project

2007 - K. Paulsson, Michael Hübner, J. Becker, J.-M. Philippe, C. Gamrat

International Conference on Field Programmable Logic and Applications (FPL), Amsterdam, The Netherlands, 2007

Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems

2007 - K. Paulsson, Michael Hübner, S. Bayar, J. Becker

ReCoSoc, Montpellier, France, 2007

Modelling and Simulation of Dynamic and Partially Reconfigurable Systems using SystemC

2007 - V. Brito, M. Kuehnle, Michael Hübner, J. Becker, E. U. K. Melcher

International Symposium on VLSI, Porto Alegre, Brazil, 2007

Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs

2007 - Michael Hübner, L. Braun, J. Becker, C. Claus, W. Stechele

IEEE Computer Society Annual Symposium on VLSI, ISVLSI, Porto Alegre, Brazil, 2007

Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs

2007 - Michael Hübner, L. Braun, J. Becker

IEEE Computer Society Annual Symposium on VLSI, ISVLSI, Porto Alegre, Brazil, 2007
Page: