Publications
Adaptive Multiprocessor System-on-Chip Architecture – New degrees of freedom in system design and runtime support
2010 - Diana Göhringer, Michael Hübner, J.Becker
In: Multiprocessor System-on-Chip: Current Trends and the Future, Springer.Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems
2010 - K. Kepa, F. Morgan, K. Kosciuszkiewicz, L. Braun, Michael Hübner, J. Becker
Transactions on Reconfigurable Technology and Systems (TRETS), 2010Dynamic System Reconfiguration in Heterogeneous Platforms The MORPHEUS Approach
2010 - Nikolaos Voros, Alberto Rosti, Michael Hübner
Series: Lecture Notes in Electrical Engineering Vol. 40, 1st ed. 2009, Springer 2009, XXIV, 280 p. ISBN 978-90-481-2426-8Performance, Accuracy, Power Consumption and Resource Utilization Analysis for Hardware / Software realized Artificial Neural Networks
2010 - A. L. S. Braga, Diana Göhringer, C. H. Llanos, J. Obie, Michael Hübner, J. Becker
International Conference on Bio-Inspired Computing: Theories and Applications (BIC-TA), Liverpool, UK.Debugging Sequential Logic on FPGAs using Internal Configuration Access Port
2010 - T. Schwalb, L. Braun, S. Werner, Michael Hübner, K. D. Mueller-Glaser, J. Becker
System, Software, SoC and Silicon Debug Conference (S4D), Southampton, UK, 2010Real-Time Software-Defined Multi Format Transmitter Generating 64QAM at 28 GBd
2010 - R. Schmogrow, D. Hillerkuss, M. Dreschmann, Michael Hübner, M. Winter, J. Meyer, B. Nebendahl, C. Koos, J. Becker, W. Freude, J. Leuthold
Photonics Technology Letters, IEEE (2010: Volume:22, Issue: 21)All-Optical FTT Signal Processing of a 10.8 Tb/s Single Channel OFDM Signal
2010 - J. Leuthold, M. Winter, W. Freude, C. Koos, D. Hillerkuss, T. Schellinger, R. Schmogrow, T. Vallaitis, R. Bonk, A. Marculescu, J. Li, M. Dreschmann, J. Meyer, Michael Hübner, J. Becker, S. Ben Ezra, N. Narkiss, B. Nebendahl, F. Parmigiani, P. Petropoulos, B. Resan, A. Oehler, K. Weingarten, T. Ellermeyer, J. Lutz, M. Möller
Photonics in Switching, Monterey, CA, USA, 2010Message Passing Interface Support for the Runtime Adaptive Multi-Processor System-on-Chip RAMPSoC
2010 - Diana Göhringer, Michael Hübner, L. Hugot-Derville, J. Becker
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS X), Samos, GreeceFast Sequential FPGA Startup based on Partial and Dynamic Reconfiguration
2010 - Michael Hübner, J. Meyer, O. Sander, L. Braun, J. Becker, J. Noguera, R. Stewart
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI 2010), Lixouri, Greece, 2010Reliability Analysis and Improvement in Nano Scale Design
2010 - M. Niknahad, Michael Hübner, J. Becker
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI), Lixouri Kefalonia, Greece, 2010Safety Aware Place and Route for On-Chip Redundancy in Safety Critical Applications
2010 - R. Girardey, Michael Hübner, J. Becker
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI), Lixouri, Greece, 2010First Evaluation of FPGA Reconfiguration for 3D Ultrasound Computer Tomography
2010 - M. Birk, C. Hagner, M. Balzer, N. Ruiter, Michael Hübner, J. Becker
5th International Workshop on Reconfigurable Communication-centric Systems on Chip (ReCoSoC), Karlsruhe, Germany, 2010Impact of Task Distribution, Processor Configurations and Dynamic Clock Frequency Scaling on the Power Consumption of FPGA-based Multiprocessors
2010 - Diana Göhringer, J. Obie, Michael Hübner, J. Becker
5th International Workshop on Reconfigurable Communication Centric Systems-on-Chip (ReCoSoC), Karlsruhe, Germany, 2010A Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip
2010 - Diana Göhringer, Michael Hübner, M. Benz, J. Becker
18th International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Charlotte, USAOptically powered low-energy demarcation device for monitoring FTTx networks
2010 - M. Roeger, B. Hiba, M. Hoh, J. Hehmann, T. Pfeiffer, Michael Hübner, J. Becker, J. Leuthold, W. Freude
Conference on Optical Fiber Communication collocated National Fiber Optic Engineers Conference (OFC/NFOEC), San Diego, CA, USA, 2010Single source optical OFDM transmitter and optical FFT receiver demonstrated at line rates of 5.4 and 10.8 Tbit/s
2010 - D. Hillerkuss, T. Schellinger, R. Schmogrow, M. Winter, T. Vallaitis, R. Bonk, A. Marculescu, J. Li, M. Dreschmann, J. Meyer, S. Ben Ezra, N. Narkiss, B. Nebendahl, F. Parmigiani, P. Petropoulos, B. Resan, K. Weingarten, T. Ellermeyer, J. Lutz, M. Moller, Michael Hübner, J. Becker, C. Koos, W. Freude, J. Leuthold
Conference on Optical Fiber Communication collocated National Fiber Optic Engineers Conference (OFC/NFOEC), San Diego, CA, USA, 2010CAP-OS: Operating System for Runtime Scheduling, Task Mapping and Resource Management on Reconfigurable Multiprocessor Architectures
2010 - Diana Göhringer, Michael Hübner, E. Nguepi Zeutebouo, J. Becker
IEEE International Symposium on Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, USA, 2010Fast dynamic and partial reconfiguration Data Path with low Hardware overhead on Xilinx FPGAs
2010 - Michael Hübner, Diana Göhringer, J. Noguera, J. Becker
IEEE International Symposium on Parallel and Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, USA 2010Car-to-X Simulation Environment for comprehensive Design Space Exploration Verification and Test
2010 - C. Roth, O. Sander, Michael Hübner, J. Becker
SAE 2010 World Congress & Exhibition, Detroit, Michigan, USAFPGA-based Embedded Signal Processing for 3D Ultrasound Computer Tomography
2010 - M. Birk, S. Koehler, M. Balzer, Michael Hübner, N. Ruiter, J. Becker
17th IEEE-NPSS Real Time Conference (RT), Lissabon, Portugal, 2010Semi-Automatic Toolchain for Reconfigurable Multiprocessor Systems-on-Chip: Architecture Development and Application Partitioning
2010 - Diana Göhringer, Michael Hübner, M. Benz, J. Becker
In Proc. of the International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, USA.