Publications

Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs

2006 - Michael Hübner, C. Schuck, J. Becker

20th International Parallel and Distributed Processing Symposium (IPDPS) 2006, Rhodos, Greece

Physical 2D Morphware and Power Reduction Methods for Everyone

2006 - J. Becker, Michael Hübner, K. Paulsson

Dagstuhl Seminar, Schloss Dagstuhl, Germany, 2006

Seamless Design Flow for Run-Time Reconfigurable Automotive Systems

2006 - Michael Hübner, J. Becker

Date 2006, Automotive Friday Workshop, Munich, Germany

New 2-dimensional partial dynamic reconfiguration techniques for real-time adaptive microelectronic circuits

2006 - Michael Hübner, C. Schuck, M. Kuehnle, J. Becker

IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, 2006, Karlsruhe, Germany

Methods for run-time failure recognition and recovery in dynamic and partial reconfigurable systems based on Xilinx Virtex-II Pro FPGAs

2006 - K. Paulsson, Michael Hübner, M. Jung, J. Becker

International Symposium on VLSI 2006, Karlsruhe, Germany

Tutorial on Macro Design for Dynamic and Partially Reconfigurable Systems

2006 - Michael Hübner, J. Becker

RC-Education 2006, Karlsruhe, Germany

Models and Tools for the Dynamic Reconfiguration of FPGAs

2005 - A. Donlin, J. Becker, Michael Hübner

IEEE-SOCC, Washington, USA, 2005

Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics

2005 - J. Becker, Michael Hübner, K. Paulsson, A. Thomas

ReCoSoc, Montpellier, France, 2005

Parallel and Flexible Multiprocessor System-On-Chip for Adaptive Automotive Applications based on Xilinx MicroBlaze Soft-Cores

2005 - Michael Hübner, K. Paulsson, J. Becker

Parallel and Distributed Processing Symposium (IPDPS) 2005, Denver, USA
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